One extra row can expose a PyTorch scan slowdown
By OnTheRice · Sources and limitations · Report a correction
A PyTorch source fix addresses a sharp slowdown when an eight-column CUDA tensor grows from 4,096 to 4,097 rows. Teams using these scans should test both sides of that boundary before changing batch size or estimating GPU capacity.
Source confidenceNot assessed
What’s changing?
Testing only a round batch size can hide a launch-layout problem that appears with one extra row; capacity estimates for short-row scan workloads should include that boundary.
Key points
- ['The 5 October source commit replaces unsigned launch-layout arithmetic with signed arithmetic. A new regression checks 4,096, 4,097 and 95,760 rows, each with eight columns.', 'The earlier issue reported a switch from a 16-by-32 thread layout to 512-by-1 beyond that boundary. The new code checks the affected row counts.', 'The fixed helper is present in the main-branch source read this hour. No packaged release or installed build was verified.']
What could change this view?
- Kernel-level author tests do not establish end-to-end savings. The original timing run shared its GPU with another application, so its large slowdown multiples are noisy and are omitted from the public summary.
Bottom line
PyTorch users whose CUDA workloads scan short rows, including affected spline-model training paths. Action: Before increasing such batches or sizing capacity, record the installed PyTorch build and profile 4,096-by-8 and 4,097-by-8 tensors on the same GPU and dtype. Check launch shape and latency, then compare a tested build containing the fix. Do not assume current main is installed.
This is based on the information recorded with this signal.
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Evidence behind this view
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Recorded connection
Testing only a round batch size can hide a launch-layout problem that appears with one extra row; capacity estimates for short-row scan workloads should include that boundary.
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Evidence against this view
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Recorded opposing evidence and risks
Kernel-level author tests do not establish end-to-end savings. The original timing run shared its GPU with another application, so its large slowdown multiples are noisy and are omitted from the public summary.
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Sources, original wording and price checks
Published
First published through Sites 06 Oct 2026, 12:18:23 SGT
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What changed
Recorded public historyA PyTorch source fix addresses a sharp slowdown when an eight-column CUDA tensor grows from 4,096 to 4,097 rows. Teams using these scans…
This is the first recorded public view. Further public updates will appear here.
- One extra row can expose a PyTorch scan slowdown
A PyTorch source fix addresses a sharp slowdown when an eight-column CUDA tensor grows from 4,096 to 4,097 rows. Teams using these scans should test both sides of that boundary before changing batch size or estimating GPU capacity.
First published by OTR: 6 Oct, 12:18 SGTPublished by OTR: 6 Oct 2026, 12:18 SGT
Why the view changed
This is the first recorded view. Future source-backed updates will appear here.
Evidence, memory & review 3 linked sources
Directional takeaway: Direction not assigned NO ENTRY
OTR reasoning: Testing only a round batch size can hide a launch-layout problem that appears with one extra row; capacity estimates for short-row scan workloads should include that boundary.
Counterpoint: Kernel-level author tests do not establish end-to-end savings. The original timing run shared its GPU with another application, so its large slowdown multiples are noisy and are omitted from the public summary.
Source-grounded facts (paraphrased)
- Time not supplied: ['The 5 October source commit replaces unsigned launch-layout arithmetic with signed arithmetic. A new regression checks 4,096, 4,097 and 95,760 rows, each with eight columns.', 'The earlier issue reported a switch from a 16-by-32 thread layout to 512-by-1 beyond that boundary. The new code checks the affected row counts.', 'The fixed helper is present in the main-branch source read this hour. No packaged release or installed build was verified.'] Source records: source-1, source-2, source-3
Evidence basis: Source-checked editorial summary; this is a paraphrase and synthesis, not a source quotation.
Source trail
- Fix CUDA short-row scan launch configuration ↗Source2026-10-05T17:13:07Z · published (UTC)
- CUDA short-row cumsum launch-layout report ↗Source2026-10-02T20:02:11Z · published (UTC)
- Current main ScanUtils helper ↗SourceSource publication time not supplied.
Review status: CHIEF APPROVED AFTER SOURCE REVIEW
No score or probability is presented.